Jeonghyun Woo

Selected Publications

1. HPCA

   Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems

   Jeonghyun Woo, Gururaj Saileshwar, and Prashant J. Nair

   In Proceedings of the 29th International Symposium on High-Performance Computer Architecture (HPCA) 2023

   Abstract Bibtex PDF Code Slides

   Best Paper Award 🏅

   As Dynamic Random Access Memories (DRAM) scale, they are becoming increasingly susceptible to Row Hammer. By rapidly activating rows of DRAM cells (aggressor rows), attackers can exploit inter-cell interference through Row Hammer to flip bits in neighboring rows (victim rows). A recent work, called Randomized Row-Swap (RRS), proposed proactively swapping aggressor rows with randomly selected rows before an aggressor row can cause Row Hammer. Our paper observes that RRS is neither secure nor scalable. We first propose the ‘Juggernaut attack pattern’ that breaks RRS in under 1 day. Juggernaut exploits the fact that the mitigative action of RRS, a swap operation, can itself induce additional target row activations, defeating such a defense. Second, this paper proposes a new defense Secure Row-Swap mechanism that avoids the additional activations from swap (and unswap) operations and protects against Juggernaut. Furthermore, this paper extends Secure Row-Swap with attack detection to defend against even future attacks. While this provides better security, it also allows for securely reducing the frequency of swaps, thereby enabling Scalable and Secure Row-Swap. The Scalable and Secure Row-Swap mechanism provides years of Row Hammer protection with 3.3X lower storage overheads as compared to the RRS design. It incurs only a 0.7% slowdown as compared to a not-secure baseline for a Row Hammer threshold of 1200.

   @inproceedings{scale-srs,
     title = {Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems},
     author = {Woo, Jeonghyun and Saileshwar, Gururaj and Nair, Prashant J.},
     booktitle = {Proceedings of the 29th International Symposium on High-Performance Computer Architecture (HPCA)},
     year = {2023},
   }

2. ICCD

   HammerFilter: Robust Protection and Low Hardware Overhead Method for RowHammer

   Kwangrae Kim, Jeonghyun Woo, Junsu Kim, and Ki-Seok Chung

   In 2021 IEEE 39th International Conference on Computer Design (ICCD) 2021

   Abstract Bibtex HTML PDF Slides Video

   The continuous scaling-down of the dynamic random access memory (DRAM) manufacturing process has made it possible to improve DRAM density. However, it makes small DRAM cells susceptible to electromagnetic interference between nearby cells. Unless DRAM cells are adequately isolated from each other, the frequent switching access of some cells may lead to unintended bit flips in adjacent cells. This phenomenon is commonly referred to as RowHammer. It is often considered a security issue because unusually frequent accesses to a small set of rows generated by malicious attacks can cause bit flips. Such bit flips may also be caused by general applications. Although several solutions have been proposed, most approaches either incur excessive area overhead or exhibit limited prevention capabilities against maliciously crafted attack patterns. Therefore, the goals of this study are (1) to mitigate RowHammer, even when the number of aggressor rows increases and attack patterns become complicated, and (2) to implement the method with a low area overhead.We propose a robust hardware-based protection method for RowHammer attacks with a low hardware cost called HammerFilter, which employs a modified version of the counting bloom filter. It tracks all attacking rows efficiently by leveraging the fact that the counting bloom filter is a space-efficient data structure, and we add an operation, HALF-DELETE, to mitigate the energy overhead. According to our experimental results, the proposed method can completely prevent bit flips when facing artificially crafted attack patterns (five patterns in our experiments), whereas state-of-the-art probabilistic solutions can only mitigate less than 56% of bit flips on average. Furthermore, the proposed method has a much lower area cost compared to existing counter-based solutions (40.6× better than TWiCe and 2.3× better than Graphene).

   @inproceedings{kim2021hammerfilter,
     title = {HammerFilter: Robust Protection and Low Hardware Overhead Method for RowHammer},
     author = {Kim, Kwangrae and Woo, Jeonghyun and Kim, Junsu and Chung, Ki-Seok},
     booktitle = {2021 IEEE 39th International Conference on Computer Design (ICCD)},
     year = {2021},
     pages = {212-219},
     doi = {10.1109/ICCD53106.2021.00043},
     issn = {2576-6996},
   }